Flash memory is an electronic (solid-state) non-volatile computer storage medium that can be electrically erased and reprogrammed. The NAND flash memory is a main type of flash memory named after the NAND logic gates, it has advantages of fast programming and short erasing time.
The NAND flash array is composed of a plurality of memory cells. Each memory cell stores a binary code 0 or 1. Several memory cells form a “word”. An address decoder of the NAND flash array includes n address output lines A0˜An−1 and 2n decoder output lines W0˜W2n−1. The decoder output line Wi is called a “wordline” and corresponds to a word in the storage array.
The wordline needs to be programmed during operation. In NAND flash datasheet, the maximum Number of Program (NOP) in a SLC wordline is 4 while in a MLC page is 1. That is, the SLC wordline may be programmed four times at most. If the wordline is programmed for more than four times, the data stored in the wordline may have error due to repeated program.
FIG. 1 is a schematic diagram showing the column architecture in the conventional technology. As shown in FIG. 1, in the column architecture, the columns include a main column which occupies 8 KB or 16 KB, an error correcting code (FCC) column which occupies 1 KB, and a redundant column which occupies 512B.
The main column stores normal data, the ECC column stores the error correcting code, and the redundant column stores the redundant characters. When in a user mode, the user may operate the main column and the ECC column, but he or she cannot operate the redundant column. When in a test mode, the operator can operate the main column, the ECC column and the redundant column.
Inside NAND flash design, however, there is no way limit end users to program a wordline several times. Therefore, it is problem that error may occur in the wordline due to over-time program.